Intel’s most up-to-date C for Steel compiler adds assist for the firm’s current and impending built-in and discrete GPUs, which include the codenamed DG2 family members of gaming GPUs, aka Intel Arc Alchemist, as very well as the long term Ponte Vecchio compute GPUs. Based mostly on the code, the Ponte Vecchio compute line-up will have at minimum two SKUs, including “Ponte Vecchio XT.”

Intel’s Ponte Vecchio is the company’s flagship compute GPU that contains 100 billion transistors and is set to power the 2 ExaFLOPS Aurora supercomputer. The part characteristics 47 elements that will be built at various fabs employing a variety of process systems. But as found by Phoronix, there will be two variations of this GPU: the Stepping A named Ponte Vecchio (PVC) and the Stepping B referred to as Ponte Vecchio XT (PVCXT). There could possibly be more variants in the potential.

Ponte Vecchio incorporates the adhering to tiles/chiplets:

• 2 base tiles created applying Intel’s 10 nm SuperFin technology
• 16 compute tiles created by TSMC to begin with and then by Intel when its 7nm technology is ready for substantial-volume producing (HVM). 
• 8 Rambo cache tiles fabbed making use of Intel’s 10 nm Increased SuperFin course of action
• 11 EMIB links made by Intel
• 2 Xe Connection I/O tiles manufactured by a foundry
• 8 HBM memory stacks generated by a DRAM manufacturer

Chip designers have a tendency to not make lots of revisions of their flagship solutions as it can be expensive and chip output volumes are comparatively confined. In addition, top rated-of-the-selection compute accelerators are in many circumstances available in just a person configuration. This is accurate for AMD’s Intuition MI250 and Nvidia’s A100, though the main GPUs can then be configured with lessen spec variants (frequently employing harvest chips that if not are not able to strike the increased goal styles). Ponte Vecchio may perhaps be taking a a bit different strategy.

Intel has usually supplied its compute accelerators (i.e., Xeon Phi) in numerous configurations, so providing typical Ponte Vecchio and prolonged Ponte Vecchio XT would be consistent with Intel’s prior tactic. Following all, Ponte Vecchio will have to deal with quite a few purposes, including supercomputers, fewer potent substantial-efficiency computing (HPC) deployments, and datacenters, so Intel will have to differentiate its choices in some way.

There is yet another risk as effectively. Back in 2020, Intel said that it would use TSMC’s N5 approach know-how to produce the compute tiles of Ponte Vecchio in a bid to meet up with the schedules for the Aurora supercomputer, but then it would generate the same tiles applying its personal 7nm node (now termed Intel 4) for later versions of PVC. When in 2021 the enterprise ceased to speak about employing its very own fab to make the compute tiles, it does not automatically mean that the strategy has been deserted. Also, calling the original variation of PVC Stepping A and subsequent edition with an in-residence manufactured compute tile as Stepping B can make perception.

One particular intriguing thing to observe is that the XT moniker used to explain the PVC Stepping B has been ATI’s and then AMD’s way to refer the top rated executing variations of its GPUs with extra stream processors and/or higher clocks. Raja Koduri, Intel’s GPU chief, earlier worked at ATI and AMD for around 10 a long time, so it appears to be like those people aged routines of making use of the XT moniker have migrated to Intel.

Now, if the XT moniker of the Ponte Vecchio Stepping B in truth usually means prolonged, it begs the question how just the portion is prolonged compared to the Stepping A. Will it have far more cores, greater clocks, lower power characteristics, or most likely all of the previously mentioned? We will master extra in the coming months.